Workshop Conclusions
The workshop was broken into 4 major components (Why Many-Core—The BIG Picture, Compiling Code for Many-Core, Many-Core Application Development, and New Paradigms—Thinking Parallel) with open discussion following each. A summary of those discussions follows:
- We need to plan to parallelize code for 1000 cores and beyond today! While planning for machines with 100 cores seems revolutionary, current thinking projects 1000 cores and beyond within 4 years of the first 100 core chip.
- Accurate, accessible, timely many-core simulations are critical. As of today, simulations involving 100+ cores (not to mention 1000+ cores) are time intensive and require significant, dedicated computational resources.
- Current experience in parallelizing code tends to be domain specific and only if absolutely necessary. General expertise in parallelizing code is difficult to find and most programmers are hesitant to use current parallel programming paradigms.
- Transactional memory solves many of the nightmare logistics of parallelizing code (locking and compatibility). However transactional memory will have a negative impact on performance in the event of a high rate of simultaneous access (i.e., collisions). As the number of cores increase, the probability of collision (in the event of data parallelism) is likely to increase.
- Attendees agreed that a range of programming options needs to be developed to provide solutions for varying developer skills. We need languages or extensions that allow programmers to continue to express problems sequentially without introducing ambiguities which will unnecessarily prevent parallelization. At the same time, for those that need highly tuned applications, tools/languages must be available that expose low level details.
- Finally, the need for an urgent solution should be tempered with concern that fundamental assumptions/decisions made now may lead to barriers in the future.
Available Proceedings
We are soliciting posters from research institutions on topics related to many-core and parallelizing code. Please refer to the directions below if interested in submitting a poster.
- All poster materials must be submitted by Friday, February 29.
- The poster background will be orange. Keep this in mind when designing your poster. Also, your institutions name will be included in the upper-right corner of the poster.
- Select a template from below and create the appropriate number of slides. Please note the size of each slide.
- The slides need to be at least 300 dpi.
- Slides can be submitted in any of the following formats:
- PowerPoint
- tiff
- Send all slides to Andy Schuh by Friday, February 29. Please indicate which template you are using.

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